SCAN A10 Manuel d'utilisateur télécharger pdf (Page 2)

IDCODE (32 Bits)

Product LineVariant

LSB (1 Bit)Manufacture

Identity (11 Bits)

Part Number (16 Bits)Version (4 Bits)

1000 0110 11100010 1110 0100 01100000GT 900

Arria 10 GT

1000 0110 11100010 1110 0000 01100000GT 1150

1000 0110 11100010 1110 1000 00100000SX 160

Arria 10 SX

1000 0110 11100010 1110 0000 00100000SX 220

1000 0110 11100010 1110 1000 00110000SX 270

1000 0110 11100010 1110 0000 00110000SX 320

1000 0110 11100010 1110 0000 01000000SX 480

1000 0110 11100010 1110 1000 01010000SX 570

1000 0110 11100010 1110 0000 01010000SX 660

Supported JTAG Instruction

Table 9-2: JTAG Instructions Supported by Arria 10 Devices

DescriptionInstruction CodeJTAG Instruction

• Allows you to capture and examine

a snapshot of signals at the device

pins during normal device

operation and permits an initial

data pattern to be an output at the

device pins.

• Use this instruction to preload the

test pattern into the update registers

before loading the EXTEST

instruction.

00 0000 0101

SAMPLE/PRELOAD

• Allows you to test the external

circuit and board-level intercon-

nects by forcing a test pattern at the

output pins, and capturing the test

results at the input pins. Forcing

known logic high and low levels on

output pins allows you to detect

opens and shorts at the pins of any

device in the scan chain.

• The high-impedance state of

EXTEST is overridden by bus hold

and weak pull-up resistor features.

00 0000 1111

EXTEST

JTAG Boundary-Scan Testing in Arria 10 Devices

Altera Corporation

Send Feedback

A10-JTAG

Supported JTAG Instruction

9-2

2013.12.02

1 2 3 4 5 6 7 ... 11 12

Commentaires sur ces manuels

Pas de commentaire